Flip-chip soldering is the critical technology for solving the current issues of electronic packaging industries that require the high I/O's. In order to increase the manufacturing ability of flip-chip technology, however, yield and reliability tissues should overcome. In this study, optimum flip-chip bonding process has been developed by using the test chips that had the electroplated solder bumps. Test chips are composed of three different types that are i) peripheral array pad chip, ii) peripheral array pad chip, and iii) area array pad chip. Each test chip has the daisy chain to consider the effect of reliability test. The electrical resistance was measured before and after reliability test. Based on these measurement, failure mode resulted from the moisture absorption was studied using scanning acoustic microscope. To achieve an optimum reflow profile of solder bump, correct temperature profile was set up with respect to the resin base flux. Different bonding forces were tested. Four underfill encapsulants were evaluated for minimum voids that caused the severe defects after reliability test. Also, the gap heights were measured with respect to applied bonding force after underfill was performed. Results from the moisture absorption and thermal cycling were discussed for flip-chip bonding on BT-resin substrates. The test vehicles using flip-chip technology have passed moisture preconditioning and temperature cycling tests.

In pursuit of lower cost packaging solutions, a new type of multichip module (MCM) has been designed and fabricated on flexible polyimide films. The new technology uses a double- sided copper metallized, through-via, polyimide film with a ball-grid-array packaging solution. The enabling technology is the interconnected mesh power system MCM topology which provides the signal wiring and power distribution using two metal layers instead of the four-layer metallization scheme as in conventional MCM topology. One side o the polyimide film has passivation openings where chips are wire bonded; this side is encapsulated to provide structural rigidity and environmental protection of the circuitry. The other side has solder pads where solder spheres are placed and reflowed to create a ball grid array package. The two-layer copper metallized polyimide film substrates with through-vias are obtained either by laser drilling of pre-metallized polyimide films or reactive ion etching of polyimide layers fabricated from their liquid precursor. Issues of solder joint integrity and module warp were investigated. Preliminary test data are also reported.

In this paper, a non-linear finite element framework was established for processing mechanics modeling of flip-chip packaging assemblies and relevant layered manufacturing. In particular, topological change was considered in order to model the sequential steps during flip-chip assembly. Geometric and material nonlinearity which includes the viscoelastic property of underfill and the creep behavior of solder ball, temperature-dependent material properties were considered. Different stress-free temperatures for different elements in the same model were used to simulate practical manufacturing process-induced thermal residual stress field in the chip assembly. As comparison, two FEM models of flip- chip package considered, associated with different processing schemes, were analyzed. From the finite element analysis, it is found that the stresses and deflections obtained from non-processing model are generally smaller than those obtained from the processing model due to the negligence of the bonding process-induced residual stresses and warpage. The values of the stresses at the given point obtained from the processing model are about 20 percent higher than that obtained from the non-processing model. The deflection values at the given points obtained rom the processing model are usually 25 percent higher than those obtained form the non-processing model. Therefore, a bigger error may be caused by using non-processing model in the analysis of process-induced residual stress field and warpage in the packaging assemblies. It is also noted that the viscoelastic property of the underfill considered in the flip-chip only cause 10 percent change of the stresses and deflections at given points at most. It is shown that the effect of viscoelastic behavior on process-induced stresses during the flip-chip assemblies can be negligible. The creep behavior of the solder balls has stronger effect on the normal stress and the peeling stress of the solder ball at the considered point. The steady state peeling stress is about 20 percent lower than the initial state peeling stress, while the steady state normal stress in x direction is only half the initial state normal stress in x direction.

Existing mini testers are mostly single axial without any active specimen alignment monitoring and adjustment capability. Fundamental investigation for packaging materials needs to be conducted in terms of constitutive laws, fracture process, failure quantities. For the first time, specimen alignment monitoring and adjustment was demonstrated for a single lap shear sample by the 6-axis mini tester and its associated alignment monitoring and control system, assisted by a high resolution laser moire measurement. This paper presents results for two types of polyimide films, one led-free solder alloy, some other conventional materials, and a flip-chip assembly subjected to a three points bending. Various mechanisms of deformation and failure for both the materials and structures have been discussed. In particular, a new constitutive model for polymer films is also proposed in this paper.

Effective power dissipation in VLSI packaging has become a performance limiting criterion in small form factor, high performance hard disk drive applications. While potential solutions may exist, many come with unacceptable associated costs. Silicon systems and seagate technology is developed a program to identify suitable packaging solutions for the associated cost/performance tradeoff. For devices with power dissipation of 1W or less, the standard TQFP was the optimum choice. For power dissipation between 1W and 1.7W, a standard TQFP with leadfingers extending to the diepaddle is sufficient. For advanced generation devices running very near 2W, there are two possible solutions: a deep downset TQFP and a CBGA with thermal vias.

In this paper, we report the preparation of crack-free relatively thick SiO₂-TiO₂ thin films on silicon substrates using the sol-gel spin-coating method. The influence of the process parameters on the quality of the film, such as the solution condition, the spin-coating speed, the heat treatment temperature and time, have been studied. We found that the cracking of the film could be avoided by selecting the right sol composition ratios, adding PVA to the sold and properly controlling the heat treatment. Most importantly, we discovered that by polishing the edges of the film after the deposition of each single layer, the number of such layers that deposited without crack formation could be substantially increased. The refractive index profile and thickness of the film have been determined using prism coupling technique and the inverse WKB method. The refractive index was found to depend on the content of TiO₂ as well as the heat treatment condition. Using an AFM, the surface morphology of the film was found to be good.

A series of composite materials of varying compositions based on a high temperature resistance engineering thermotropic liquid crystalline polymer and particulate aluminium nitride (AlN) were compounded at relatively low temperature using a co-rotating twin screw extruder/compounder equipped with the segmented screws. The compounded composites are injection molded into different shapes, i.e., dumbbell, rectangular bar and cylindrical disk, for various physical and mechanical tests. In particular, detailed study was carried out to understand the effect of AlN on the dielectric constant, thermal conductivity and thermal expansion behavior of these materials. Results have shown that the thermal conductivity steadily increases with AlN filler concentration. An increase by about 80 percent in thermal conductivity of the composite materials is achieved as compared to the unfilled polymer. The dielectric constants of these composites were found to increase with filer content and range from 3.6 to 5.0 at 1 kHz and 3.0 to 4.2 at 10 MHz. Substantial reductio in thermal expansion coefficient was also achieved in the composite materials. Attempt has been made to correlate the experimental data with composite theories.

IBIC imaging of buried structures of semiconductor devices is carried out with a scanned focussed MeV ion beam. The large range of these ions allows direct imaging of sub- surface through passivation layers, a feature not available to the well established EBIC technique. As multi-level designs become more prevalent this deep penetration is a significant advantage. The nuclear microscope is briefly described here. Recent examples of the IBIC analysis of CMOS and diffused junction devices are given, and the degradation of IBIC images with increasing ion dose is discussed. It is demonstrated that contrast is present in IBIC images even from junctions not directly connected to the preamplifier. The production of significant charge signals from unconnected junctions allows the imaging of such junctions, a highly desirable feature in the case of complex microcircuits. The contrast from unconnected junctions vanishes if these junctions are shortened, as will be shown.

The developments of processing technology and design make it possible to increase the clock speed and the number of input outputs (I/Os) in memory devices. The interconnections of IC package are considered as an important factor to decide the performance of the memory devices. In order to overcome the limitations of the conventional package, new types of package such as Ball Grid Array (BGA), chip scale package or flip chip bonding are adopted by many IC manufacturers. The present work has compared the electrical performances of 3 different packages to provide deign guide for IC packages of the high performance memory devices in the future. Those packages are designed for the same memory devices to confront to the diversity of memory market demand. The conventional package using lead frame, wire bonded BGA using printed circuit board substrate and flip chip bonded BGA are analyzed. Their electrical performances are compared in the area of signal delay and coupling effect between signal interconnections. The electrical package modeling is built by extracting parasitic of interconnections in IC package through electro-magnetic simulations. The electrical package modeling is built by extracting parasitic of interconnections in IC package through electro-magnetic simulations. The analysis of electrical behavior is performed using SPICE model which is made to represent the real situation. The methodology presented is also capable of determining the most suitable memory package for a particular device based on the electrical performance.

We report for the first time, 3D tapered polymeric waveguides fabricated by the compression-molding technique. Compression-molded polymeric waveguides presented herein provide a feasible solution to bridge discrete optoelectronic devices having the apertures of a few microns to hundreds of microns in both horizontal and vertical directions. One-cm long tapered channel waveguides with the cross-sections of 5 micrometers X 5 micrometers at one end and 100 micrometers X 100 micrometers at the other end were fabricated. These polymeric channel waveguides have a propagation loss of 0.5 dB/cm when the 632.8 nm He-Ne laser light is coupled from the small end to the large end and of 1.1 dB/cm when coupled from the large end to the small end. By confining the energy to the fundamental mode, when coupling from large end to the small end, a low-loss packaging can be achieved bidirectionally.

The architectural design and performance of bi-directional optical backplanes with multi-bus lines are presented and analyzed. Previously, we have reported a general purpose bi- directional optical backplane with single bus line. With the integration of vertical-cavity surface-emitting lasers and photodetector arrays, in this paper, we further propose and demonstrate an optical backplane with multi-bus lines. With the multi-bus line structure, the bandwidth of the bus system is greatly increased. The performance related issue, such as the power budget consideration, the misalignment, etc., are also discussed, and related experiments are presented.

The original chemical vapor deposition (CVD) method used in fabrication A₂B₆ films, photodetectors and electro- luminescent emitters based on these films have been reported. The basic idea behind this method is thermal decomposition of dithiocarbamates (DTC). The proposed method does not require expensive materials and vacuum equipment. Moreover, the DTC-CVD method differs from the known CVD methods in source material delivery method, a low deposition temperature and a non-sealed reactor geometry. Both CdS and CdS_1-xSe_x were obtained at temperature of 240- 280 degrees C and were activated directly in the grown process by Cu and In, or by annealing in mixture CdS: Cu, Cl. Photodetectors with absorption maxima at 500-750 nm have dark conductivity (sigma) _D EQ 10^-9 divided by 10^-8 (Omega) ^-1 cm^-1 and photoconductivity (sigma) _ph equals 10^-2 divided by 10^-1 (Omega) ^-1 cm^-1 at 200 lux. CdS films with thickness of 6 divided by 12 micrometers have been used as sandwich-type photoconductor detectors. Electroluminescence ZnS:Mn films prepared by DTC-CVD method at the substrate temperature of 200 DIV 300 degrees C without additional annealing have high luminance and luminous efficiency. Deposition at a law temperature makes it possible to use flexible polymer films or low cost glasses as substrates. Because the technique is rather simple and can be applied to obtain all types of thin film electroluminescence structure layers, we expect a low price of light sources based on these films.

This paper describes the formation and application of reversible low temperature bonds for fabrication of 3D microelectronic structures. The basis of this reversible bond is a three-step low temperature bonding process. This tree-step process consists of 1) pressure, 2) pressure and temperature and 3) temperature. The first and second steps of this process create a uniform, void free, weak bond that can be easily severed. The third step consists of a long anneal at 200 degrees C that creates a bond of strength greater than 1000 ergs/cm². The reversibility and reusability of a bond processed through the first and second step of the three-step process is investigated in this paper.

We have developed a three-step process to low temperature direct bond silicon and/or SiO₂ surfaces. The process activates the surface with various plasma treatments including NH₃, Ar and O. These activation processes allow a very strong low temperature bond to be created. The process requires techniques distinctly different from those found in previous work for reproducible results. The plasma processes do not result in a bond that propagates as a wave resulting from a point source initiation. A substantial pressure is required to initiate the bond. We have found that the three-step process using pressure and temperature results in very strong, reproducible bonds. The basic process consists of 1) the application of pressure for a period of 10 minutes, followed by 2) pressure and low temperature for another 30 minutes at 200 degrees C and finally 3) an anneal at low temperature of 200 degrees C for 24 hours. The bonds created by this process have a strength > 1000 ergs/cm², which compares favorably with a conventional direct bond requiring an anneal > 1000 degrees C.

This work compares experiment with a theoretical model of the bondability of silicon samples of various curvature. Spontaneous bonding of a 500 micrometers silicon wafer requires a curvature of greater than 100 m. A theoretical model has been developed to predict the curvature conditions for bonding of non ideal samples with radii of curvature smaller than 100 m where an external pressure is applied to the material to cause the pair to become conformal. This theory also predicts the final curvature of the bonded pair. In this paper the force required to bond the pair an the final radius of curvature after bonding is experimentally measured and compared with this theory.

Polycrystalline-silicon TFT technology is opening the door to highly reliable, high-resolution, high-performance, large AMLCD's that will be inevitable for HDTV and other advanced applications. For formation of polycrystalline silicon, excimer laser annealing has shown to be superior to all other techniques with respect to quality, reliability and economy. In excimer laser annealing a high-power laser beam is scanned over the surface of the substrate, coated with amorphous silicon. The amorphous silicon is heated up within a few nanoseconds, melts and recrystallizes into polycrystalline silicon. The substrate remains unaffected. The pronounced nonlinearity of the annealing process, the high quality requirements and the high process speeds in production lines make high demands on the laser beam parameters such as energy stability and beam uniformity, and on laser output power. This presentation will discuss the results of recent development in high-power excimer laser for annealing, and their impact on production of AMLCD's.

Audible acoustic wave generation during KrF excimer laser processing of microelectronic materials Si, Cu and Al is investigated. It is found that amplitude of the acoustic wave is closely related to laser pulse number and laser fluence. Due to the laser cleaning of surface contamination, the amplitude reduces to a steady level with laser irradiation up to a pulse number of 10. The first peak-to- peak amplitude of the acoustic wave at the steady condition is used to evaluate laser interaction with the materials. The amplitude analysis shows that there exists a threshold fluence. For laser fluence higher than the threshold, the amplitude increases with laser fluence. Threshold fluences are 1.1, 1.35 and 1.2 J/cm² for Si, Cu and Al respectively. It also shows that the increase of the amplitude starts to saturate for laser fluence higher than 10 J/cm². According to ablation rate measurement, these thresholds of fluences are the same as the ablation thresholds of the materials. Saturation of amplitude increase is due to plasma shielding effect during the laser ablation of the materials. Theoretical calculation agrees well with the experimental result. Acoustic wave measurement provides a simple method to detect the threshold fluences of laser ablation and plasma shielding. By proper calibration, it can also be used as a real-time measurement of laser ablation rate. By applying appropriate pulse number, the laser processing of microelectronic materials can be controlled in-situ.

A laser cleaning model was established for removal of non- absorbing particles from an absorbing solid surface by taking adhesion force and cleaning force into account. The cleaning force per unit area due to laser-induced thermal expansion of a substrate surface is (gamma) E (Delta) T(0, t), where (gamma) , E, and (Delta) T(0, t) are the linear thermal expansion coefficient, the elastic modulus and temperature rise at the substrate surface, respectively. The cleaning condition and threshold fluence can be obtained by comparing the cleaning force and the adhesion force. The theoretical analysis shows that cleaning force increases with increasing laser fluence, deducing the pulse duration, or decreasing laser wavelength, which leads to a higher cleaning efficiency at higher laser fluence, smaller pulse duration or shorter laser wavelength. The experimental results show that the cleaning threshold fluence for laser removal of quartz particles from silicon surfaces is about 135 mJ/cm², which is in good consistency with the theoretical threshold fluence of 120 mJ/cm². With increasing laser fluence, the cleaning efficiency increases, which has been predicted by our theoretical analysis.

In this study, nickel-phosphorus (NiP) surface is irradiate by a KrF excimer laser beam. Atomic force microscope and x- ray diffraction are employed to study the surface morphology and the material structure. For laser fluence form 124 mJ/cm², thin periodic structure morphology is formed in the irradiated region. When laser fluence exceeds 200 mJ/cm², a microcosmic-smooth ripple morphology is obtained. The period of the second morphology is obviously larger than that of the first morphology. The morphology is dependent on the original surface condition, laser fluence and laser pulse number in the low laser fluence region and only laser fluence and laser pulse number in the high laser fluence region. 1D thermal conduction model is used to predict the temperature rise in the irradiated region. Surface melting is predicted to take place at laser fluence about 200 mJ/cm². The interaction mechanism between laser beam and NiP surface is proposed based on the theoretical calculation and experiment.

Excimer laser projection methods have ben developed to directly create high resolution electrical circuits in both thin nd thick-film metallic layers in order to form robust, compact multi-chip module interconnection devices, miniature sensor elements, miniature flexible printed circuits, antennas etc at high sped and low cost. Patterning over small or large areas is possible at high speed using simple step and repeat or more complex synchronous mask and workpiece scanning methods. Ablation rates depend strongly upon the thickness of the metal layer varying from complete metal removal with 1 laser shot for thin films to multiple 10s of shots for films to a few J/cm² for screen printed polymer thick films or thick sputtered films. Multiple layer interconnect circuits and complex advanced sensor devices have been successfully fabricated using these excimer laser metal film patterning methods together with laser via drilling and patterning of dielectric layers using a laser tool with appropriate level to level alignment and mask changing and scanning facilities.

This paper describes the result of optimizing three process variable to achieve a narrow line width in laser engraving of ITO conductive coatings using the Taguchi technique of experimental design. The laser used is a NEC Q-switched continuous wave Nd:YAG laser operating at a wavelength of 1.064 micrometers . The three process variables explored are: Q- switch frequency, speed of X-Y stage, and attenuator ratio of laser power. The various parameters were assigned to an L9 orthogonal array. The experiments were conducted with two repetitions each of which employs complete randomization. It was found that a narrow line width could be achieved with a Q-switch frequency of 25 kHz, scribing speed of 2000 mm/min, and beam attenuator setting of 35. A confirmation experiment was carried out and the results fell within the predicted 95 percent confidence interval.

Excimer laser have developed from physicists' 'toys' to powerful manufacturing tools, offering unique benefits to a wide range of applications. Nearly all technical and biological/medical materials can be structured by the intensive UV light. In the year 1997 the number of installations on manufacturing floors will be much higher than ever before. Besides the medical uses the most important applications are DUV lithography, TFT annealing for flat panel displays and microdrilling of hole arrays, especially for ink jet printer heads and or microelectronics packaging. This paper will present three main reasons of this breakthrough: The first is in the regard to the performance of the excimer laser itself. Technology developments by laser manufacturers have resulted in remarkable improvements in component lifetime, reliability, cost of ownership and ease of use. With gas lifetimes in excess of 10⁸ pulses, laser tube exchange intervals longer than 5 X 10⁹ pulses and integration of internal halogen generators quasi sealed-off excimer laser with hands-free operation are accomplished. The actually introduced NovaLine technology combines the experience of more than 4000 installed excimer laser with a completely new laser engineering. The second topic is a much more efficient way of using the UV photons. Progress in UV optics will be demonstrated with advanced approaches for beam delivery systems for i) drilling of interconnections in electronic packaging, ii) processing of micronozzle arrays for ink jet printers, and iii) line-beam-optics for scanning applications, especially for annealing of TFT's for AMLCD flat panel displays. The final reason is the achieved application performance itself, which will be shown with actual results.

Laser micro-drilling technology plays a more and more important role in industry, especially in the fabrication of multi-layer electronic packages. In such applications, non- metals are often used as insulators, in which via holes are formed to provide vertical interconnections for densely packed 3D wiring networks. Mechanical punch tools have been the primary means to form holes in ceramic sheets and in polymer boards since the 1970's. As the cost of fabricating punch heads increases drastically and the demand for quick turn around part build becomes more routine, flexible via forming technologies, such as laser drilling, have become more prevalent. In laser drilling, CO₂, Nd:YAG, and excimer lasers are often used. Their drilling capabilities, drilling mechanisms, and hole qualities are different because of the different laser beam characteristics such as wavelength and beam energy distribution. In this paper, the mechanisms of laser drilling are briefly reviewed. The results of the experiments on excimer laser drilling of two types of polymer: polyimide and polyethylene terephthalate, are reported. It is found that the etch rate increases with increase of fluence, an the wall angle of drilled holes is dependent on the fluence. The material removal by a laser pulse is highly controllable. There exists an optimal fluence range to obtain clean and smooth edges of quality holes for a given material at a given laser wavelength.

A quasi-static 2D heat conduction analysis is used to deduce the geometrical profile of a cavity pyrolytically etched on an isotropic silicon substrate by a stationary CW Ar⁺ laser with a Gaussian intensity profile. Starting with a substrate having a flat surface, the analysis progressively removes regions of the substrate to model the actual etching action. The finite element method is used to solve the non- linear problem iteratively. Multiple reflections of the laser beam in the etched cavity are also modeled assuming that the substrate surface is perfectly diffused. Laser etching experiments performed on a silicon substrate in a CCl₄ gas ambient are used to verify the numerical routine. Comparison with the numerical results indicates that the desorption of SiCl₂ radicals is probably responsible for the final etched profile obtained. Deposition of the residue from the chemical etching was also observed in the etched cavity. The re-deposition was found to proceed in different manners for stationary and scanning beams. These differing actions of re-deposition are explained in the context of the different temperature distributions induced in the two cases.

In this paper the main optical properties of Si nanocrystalline films prepared by pulse laser deposition of Si in N₂ or He atmosphere were reviewed. Both reflectance and transmission spectra were measured in the range of 200-1200nm and were used for calculation of films optical constants. It has been shown that films have composite structure and contain Si nanocrystallites in SiO_xN_y matrix. Obtained visible photoluminescence of these films is related to quantum confinement in Si dots.

The diamond films were prepared by a microwave chemical vapor deposition system. The molybdenum substrates were used. The x-ray diffraction spectra of the films contain peaks of the (111) and (220) facets of diamond. Scanning electron microscope and optical mecrograph reveal that the films consist of ball-like carbon structure, and diamond grains embedded on the balls. Raman spectra and surface resistance measurement also indicate that the films are highly graphitic diamond films. The field emitter was made of the diamond-ball like carbon film cathode and ITO anode. The transparent conducting anode technique was used to measure the 1-V curves and the emission sites. The measurements were operated in a vacuum system with a base pressure of 10^-4 torr. The turn-on field of 10 V/micrometers was obtained. After Ar⁺ ion impacting the highly graphitic diamond film cathode, the turn-on field was increased dramatically to 22 V/micrometers . The good quality diamond film emitter was also reported.

The recent low price trend of electronic products has made IC manufacturing efficiency a top priority in the semiconductor industry. Post mold cure (PMC) process, which generally involves heating the packages in the oven at 175 C for 4 to 8 hours, takes up much longer time than most other assembly processes. If this PMC process can be reduced or eliminated, semiconductor makers will be rewarded with a much higher cost merit. We define the purpose of Non-PMC as 'to get high reliability with suitable physical and electrical properties without PMC'. We compared carious properties of molding compound before and after PMC. We found that curing reaction has almost complete through DSC and C-NMR measurement, but several properties have not stabilized yet, and that not all properties after PMC were better than before PMC. We developed new grade of molding compound considering these facts. And we found that main factors to accomplish non-PMC compound are curability and flowability, and more, increasing of fundamental properties. To accomplish non-PMC, at first, molding compound need to have very high curability. Generally speaking, too high curability causes low flowability, and causes incomplete filing, wire sweep, pad shift, and weak adhesion to inner parts of IC packages. To prevent these failures, various compound properties were studied, and we achieved in adding good flowability to very high curable molding compound. Finally, anti-popcorn property was improved by adding low moisture, high adhesion, high Tg, and high flexural strengths at high temperature. Through this study, we developed new compound grade for various package, especially large QFP using standard ECN resin.

In this work we have combined the hydrogen ion cut technology with low temperature direct bonding. Our work allows silicon on insulator (SOI) materials produced with process temperatures below 400 degrees C. Previous work with hydrogen ion cut and other methods of forming SOI have required temperatures greater than 1000 degrees C. The work in this paper thus creates the opportunity to use the hydrogen ion cut technique to create SOI with ow process temperatures.