For deep submicron device manufacturing, Rapid Thermal Processing (RTP) tools will play a major role. Current RTP tools have not been fully integrated into manufacturing. The most important problem is the product wafer temperature control. Data obtained on implant activation, titanium silicidation and oxidation processes will be reviewed to present the capability of current tools. Temperature control requirements for deep submicron device manufacturing will be discussed. Process performance of current RTP tools fall far short of the requirements.

During rapid thermal processing, temperature non-uniformities are likely to occur because of increased thermal radiation from the wafer edges, or inappropriate illumination of the wafer. Up to now, despite the fact that the optical conditions of the wafer play a dominant role in temperature non-uniformity, little work about the effect of heating lamps and reflector arrangement on wafer illumination distribution has been published, if one compares with other topics related to Rapid Thermal Processing (RTP). Simulation software, using geometric optics, has therefore been developed to calculate the illumination of a wafer inside a RTP processing chamber. The main parameters of the analytical model are: (1) the processing chamber geometry, (2) the lamp number and location, and (3) the reflector characteristics. Each incident light component, i.e. direct or reflected, is identified, its contribution to the illumination of the wafer is calculated, and the corresponding contour maps depicted. Then, the heat diffusion equations is numerically solved in two dimensions, and 2D thermal maps of a 4' Si wafer are given vs. various experimental conditions, such as the effect of individually adjusting the electrical power applied to each lamp, and the impact of rotating the wafer.

Recent studies of wafer temperature control in rapid thermal processing systems have indicated that a multi-ring circularly symmetric lamp configuration with independent (multivariable) control of the power applied to each ring is likely to be more successful than the earlier lamp design approaches. An important issue in such multi-ring lamp systems is the optimal shaping of the output heat flux profile (HFP) of each ring, as measured at the wafer surface with a reference value of input power, to provide good controllability of the wafer temperature. In this paper we seek to optimize the ring HFPs via the lamp design parameters: ring positions and widths. We start by determining the heat loss profiles over the wafer surface for a variety of temperature setpoints and processing conditions. In order to maintain temperature uniformity across the wafer at a given setpoint, the lamp system should provide a compensating HFP. The total lamp HFP is the sum of the individual ring HFPs weighted by their respective applied powers. The HFPs are, in turn, functionally dependent on the lamp design parameters and this dependence can be measured through a calibration process. Therefore, the resulting optimization problem reduces to determining the lamp design parameters that result in a total lamp HFP which best approximates the collection of the wafer heat loss profiles. Our method provides a practical technique for determining the optimal lamp design parameters.

A new method of temperature control for rapid thermal processing of silicon wafers is presented whereby in-situ wafer temperature is determined by measurement of wafer thermal expansion via a laser autofocus mechanism. Various potential error sources are considered including wafer bow, effects of wafer doping and crystal orientation. Results are provided showing that variations in crystalline orientation and dopant levels have no measurable effect on expansion of the silicon substrate, allowing a direct correlation of wafer expansion to temperature. The expansion measurement technique and implementation into a rapid thermal processing system as a temperature control is described. Preliminary data show the wafer to wafer repeatability of temperature is 1% (3-(sigma) ) using wafer expansion as the control.

Low thermal-budget semiconductor processing will have a major impact on future Ultra Large Scale Integration (ULSI) and Si-based heterostructure devices because it reduces thermal- stress-generated-defects and maintains compact doping profiles and heterolayer integrity. This paper discusses low temperature Si homoepitaxy at temperatures as low as 250 degree(s)C by photo-enhanced chemical vapor deposition (PCVD) using the photolytic decomposition of Si₂H₆ by the 193 nm emission of an ArF excimer laser in an ultra high vacuum system. Very low defect density films, in terms of stacking faults and dislocation loops (less than 10⁵ cm^-2), and excellent crystallinity have been grown. The growth rates increase linearly with laser power.

Laser-assisted epitaxial growth of III-V semiconductors has been achieved using both pyrolytic and photolytic reactions. A focused beam from an argon laser operating at 514.5 nm was used to 'direct-write' epitaxial microstructures using the pyrolytic process, whereas an excimer laser was utilized to examine the photolytic process. Dependence of the film properties on the laser parameters is investigated. This discussion is limited to homo- and heteroepitaxy of GaP.

We present results on the laser-induced photochemistry, ablation, and deposition of a variety of precursor compounds used for III-V semiconductor growth. With compounds such as monoethylarsine, triethylarsenic, and triethylgallium, our efforts are focused on using lasers to generate and detect atomic hydrogen, a species that is known to be a good radical scavenger in certain III-V semiconductor growth environments. We also present results on the laser ablation of inorganic salts that may be useful as precursors for III-V thin-film growth. Here, K₃Ga₃As₄ and K₂Ga₂Sb₄ are irradiated with various excimer laser wavelengths, and we report on the ablation and deposition chemistry induced by such radiation. The prognosis for viable film growth using this approach is also discussed. Finally, recent efforts involving the photochemistry and subsequent deposition characteristics of a Pt- containing organometallic compound, C₅H₅Pt(CH₃)₃, are presented.

Ge_xSi_1-x infrared detectors grown by Rapid Thermal CVD are demonstrated. External quantum efficiency of 7% at (lambda) equals 1.32 micrometers and eye-diagram at 1.5 Gbit/s are obtained for Ge_.29Si_.71 waveguide pin detectors. It is shown that external quantum efficiency is limited by fiber to waveguide coupling efficiency. These, along with system considerations suggest that with further improvements, such devices can be used in Si- based monolithic optoelectronic receivers.

As device dimension is scaled into the deep-submicron regime, high quality thin-gate dielectric films with very uniform thickness are becoming increasingly necessary. The requirements on these thin gate oxides are--accurate control in growth, high breakdown field, low interface state density, good hot carrier reliability, good TDDB properties, and effective masking against impurity diffusion. Rapid thermal oxidation is one method to achieve high quality sub- 10 nm oxide films. In addition, by simultaneously or sequentially introducing gases other than O₂;, such as NH₃ or N₂O, during the oxidation processes, one can dramatically improve certain aspects of the resulting dielectrics. Films with very high dielectric breakdown voltage and hot-carrier-hardness have been achieved. When the process is optimized, the performance of these transistors is also excellent. This paper will discuss the challenges facing gate dielectrics for sub-half micron MOSFET's, and the use of rapid thermal oxidation to achieve high quality gate dielectrics for these applications.

This paper offers the results of investigations of forming the submicron topological structures of the 'contact window'-type by using only all-dry vacuum and plasmas technologies. A technological process of manufacturing a three-layer structure 'metal-dielectric-metal' by using the LVPL is developed to study electrical characteristic of systems with micron and submicron contact windows. The contact resistance versus contact window dimensions obtained with the aid of such structures is the inverse square dependence which correlates well with the calculated one. Analysis is made of the relationship between lithographic and electric parameters of contact systems with micron-size features.

Easy to make, potentially high efficient Schottky type solar cells are presented. Patterning of the cells of Si wafers was achieved by photo-ablation using a UV Excimer laser. We have found that the patterned cells were as much as 15% more efficient than non-patterned cells.

Excimer laser radiation at 193 and 248 nm has been used for the maskless and selective removal of chromium (Cr) contaminants present on polyimide surfaces with fine-line gold (Au) metallization features patterned on them. Excimer laser cleaning has been successful in restoring the dielectric performance of these polyimide surfaces. The differences in ablation thresholds and rates and the respective process windows, established at 193 and 248 nm, for the removal of Cr are discussed.

Laser engraving device with image preprocessing is described in this paper. A pattern is imported into a computer by a scanner, then the image information is processed. According to the size required and using the density of 84 dpi, a desired picture is engraved by an axial flowing CO₂ laser beam. The objects engraved can be wood, glass, china, marble, stainless steel, etc. The maximum engraving area is 1000*1500 mm².

We have applied laser direct-write processing techniques to the fabrication of 'multi-chip modules' (MCMs), a next-generation advanced semiconductor packaging technology. To minimize the amount of laser processing which is required, we have created new MCM designs which allow the formation of custom interconnects from generic wire segments solely by means of localized laser links and cuts. In a recent large scale demonstration, we successfully laser-customized a multi-chip modules by means of 3,970 links and 1,624 cuts. The multi-chip module functioned successfully when inserted into its test bed. Separate pulse propagation experiments on the passive substrate prior to assembly demonstrated that such laser-formed interconnects have performance virtually indistinguishable from conventionally patterned ones.

The formation of conducting films from composite films comprised of gold clusters in plasma polymerized polyfluorocarbon (PPFC) is described. A focussed, visible laser beam is used to coalesce the gold clusters within the PPFC matrix. Heating the composite with the laser causes the film to collapse with a loss of weight due to decomposition and volatilization of the polymer. Under the appropriate laser power and scanning conditions, coalescence of the gold particles results in a conducting metal line, exhibiting close to bulk metal resistivity.

Lasers have come into wide use for the repair of liquid crystal (LCD), electroluminescent (EL) and plasma flat panel displays. As displays have become larger, more complex and thus increasingly more expensive, repair also has become indispensable. Laser repaid equipment can perform either as on-line production machinery or in a failure analysis role. Most of these repairs have been subtractive, i.e., to remove excess material that causes shorts. Additive repair is a new technique involving metal deposition to correct open faults. This paper traces the development of laser repair to improve yields of flat panel displays.

Shallow junctions under silicide contact layers have been fabricated using a gas-phase dopant source and pulsed laser heating. A spatially homogenized 308 nm XeCl pulsed laser is used to drive adsorbed gas phase dopant species, e.g. BF₃, AsF₅, PF₅, into the silicide overlayers and to outdiffuse dopants into the silicon substrate. High interface concentrations (C_int > 10²⁰ atoms/cm³) and junctions < 1500 angstroms in depth have been obtained using this technique. Film/substrate interface roughness is unaffected by laser irradiation. Results from SIMS, RBS, and TEM analyses are presented in this paper.

Although rapid thermal processing (RTP) has existed for a number of years, difficulties associated with pyrometric temperature measurement and control have prevented RTP's widespread acceptance in manufacturing. We show that nominal process-associated film thickness variations drastically reduce the wafer-to-wafer process repeatability using pyrometry. These thickness variations lead to large changes in wafer emissivity producing temperature errors of as much as +/- 100 K. The result is reduced process capability which limits the utility of RTP in manufacturing. This paper contrasts pyrometric temperature feedback with power control (PC). The data indicate that PC results in significant reduction of wafer-to-wafer temperature fluctuations, to better than +/- 5 K. The improvement is due to minimal sensitivity of PC to dielectric-film-induced wafer emissivity fluctuations. Therefore, PC can be used without the need for back-side strip, allowing seamless integration into semiconductor processing. We also present a theoretical basis for power control and discuss the limitations and boundary conditions governing the technique.