The study of embedded processing system on high-speed banknote sorting device

Jian Zhang; Qingwang Qin; Li Feng; Zhiguo Feng; Jibing Lu; Sifu Wu

doi:10.1117/12.2034253

19 December 2013 The study of embedded processing system on high-speed banknote sorting device

Jian Zhang, Qingwang Qin, Li Feng, Zhiguo Feng, Jibing Lu, Sifu Wu

Proceedings Volume 9045, 2013 International Conference on Optical Instruments and Technology: Optoelectronic Imaging and Processing Technology; 90450M (2013) https://doi.org/10.1117/12.2034253
Event: International Conference on Optical Instruments and Technology (OIT2013), 2013, Beijing, China

Abstract

In high-speed banknote sorting system, to real-time deal with massive data and complex algorithm is required. This paper proposes an embedded processing system, which realizing the high-speed image acquisition and real-time processing of banknote image. The system is a customized and flexible architecture consisting of one large scale FPGA and four high performance DSP chips. The five processors have good communication with each other by RapidIO BUS. After evaluating the system-calculating overhead, the data throughput, and the hardware characteristics, we presents the whole processing program systematically running in FPGA and DSPs. In order to make full use of the advantage of FPGA highly parallelism and DSP deeply pipeline, the FPGA is designed for running parallel algorithms with large amount of calculation but low complexity of control flow, and the rest of algorithms are assigned to the four DSPs relatively. Finally, the whole program of image processing at the speed of 40 frames per second is realized on the embedded processing platform. The system has been successfully used in high-speed banknote sorting device, which has showed stable and reliable properties. And it also has excellent performance in processing ability with the verification of large scale operation.

Citation Download Citation

Jian Zhang, Qingwang Qin, Li Feng, Zhiguo Feng, Jibing Lu, and Sifu Wu "The study of embedded processing system on high-speed banknote sorting device", Proc. SPIE 9045, 2013 International Conference on Optical Instruments and Technology: Optoelectronic Imaging and Processing Technology, 90450M (19 December 2013); https://doi.org/10.1117/12.2034253

ACCESS THE FULL ARTICLE

INSTITUTIONAL
Select your institution to access the SPIE Digital Library.

SELECT YOUR INSTITUTION

PERSONAL
Sign in with your SPIE account to access your personal subscriptions or to use specific features such as save to my library, sign up for alerts, save searches, etc.

PERSONAL SIGN IN

No SPIE Account? Create one

PURCHASE THIS CONTENT

SUBSCRIBE TO DIGITAL LIBRARY

50 downloads per 1-year subscription

Members: $195

Non-members: $335 ADD TO CART

25 downloads per 1 - year subscription

Members: $145

Non-members: $250 ADD TO CART

PURCHASE SINGLE ARTICLE

Includes PDF, HTML & Video, when available