Paper
19 January 1993 High-speed test station for solid state imagers
George J. Yates, Kevin L. Albright, Bojan T. Turko
Author Affiliations +
Abstract
A PC-based programmable solid-state imager test station has been designed and is in final development phases. It is designed to provide a flexible universal high-speed platform for evaluation of different imager designs and formats including various multiport configurations. The system provides drive and acquisition circuitry and components to allow electro-optic characterization of imagers as a function of pixel readout rate. The data are scan-converted to RS-170 format for analysis. The system's functional capabilities and performance are presented. Examples of program code to generate three phase clocks for an 8-port Frame Transfer EEV CCD are included. A sampling of preliminary results obtained from variable rate clocking of this imager are discussed.
© (1993) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
George J. Yates, Kevin L. Albright, and Bojan T. Turko "High-speed test station for solid state imagers", Proc. SPIE 1757, Ultrahigh- and High-Speed Photography, Videography, and Photonics, (19 January 1993); https://doi.org/10.1117/12.139135
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CITATIONS
Cited by 4 scholarly publications.
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KEYWORDS
Imaging systems

Clocks

Video

Solid state physics

High speed photography

Photonics

Light sources

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