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System of a programmable-chip-based image-processing system

[+] Author Affiliations
Fan Wu

University of Liverpool, Department of Electrical Engineering and Electronics, Brownlow Hill, Liverpool, L69 3GJ, United Kingdom

Jeremy S. Smith

University of Liverpool, Department of Electrical Engineering and Electronics, Brownlow Hill, Liverpool, L69 3GJ, United Kingdom

Andrew J. Tickle

Coventry University, Department of Aerospace, Electrical and Electronic Engineering, Priory Street, Coventry, CV1 5FB, United Kingdom

Qiang Huang

Shenzhen University, Department of Software Engineering, Shenzhen 518060, China

J. Electron. Imaging. 22(2), 023026 (Jun 18, 2013). doi:10.1117/1.JEI.22.2.023026
History: Received August 22, 2010; Revised August 9, 2012; Accepted April 30, 2013
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Abstract.  Recent advances in semiconductor technology have made it possible to integrate an entire system including processors, memory, and other system units into a single programmable chip [a field programmable gate array (FPGA)]. These configurations, called system on a programmable chip (SOPC), have the advantage of being designed and implemented quicker than traditional technologies and are relatively cheap to produce for low volume applications. One processor-intensive application, which is ideal for SOPC technology, is that of image processing where there is a repeated application of operations on the two-dimensional data. We present the results of research that investigate the use of SOPC technology in building a real-time image-processing system with the capability of performing video acquisition, image processing, and image display. In order to solve the complex on-chip data communication, while not degrading the transfer speed of large amounts of video data, a novel and effective bus arbitration solution called “simultaneously multimastering Avalon streaming transfer with peripheral-controlled waitrequest” is developed. Rather than using the software approach to initialize direct memory access (DMA) like transfers, this solution takes advantage of the FPGA hardware resources to perform bus arbitration and hence increase system efficiency.

© 2013 SPIE and IS&T

Citation

Fan Wu ; Jeremy S. Smith ; Andrew J. Tickle and Qiang Huang
"System of a programmable-chip-based image-processing system", J. Electron. Imaging. 22(2), 023026 (Jun 18, 2013). ; http://dx.doi.org/10.1117/1.JEI.22.2.023026


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