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SCAN secure processor and its biometric capabilities

[+] Author Affiliations
Raghudeep Kannavara

Wright State University, Assistive Technologies Research Center, 3640 Colonel Glenn Highway, Dayton, Ohio 45435

Sukarno Mertoguno

CGO Inc., 40 Wilson Street, Malboro, Massachusetts 01752

Nikolaos Bourbakis

Wright State University, Assistive Technologies Research Center, 3640 Colonel Glenn Highway, Dayton, Ohio 45435

J. Electron. Imaging. 20(2), 023014 (June 02, 2011). doi:10.1117/1.3582930
History: Received December 16, 2009; Revised February 10, 2011; Accepted April 05, 2011; Published June 02, 2011; Online June 02, 2011
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This paper presents the design of the SCAN secure processor and its extended instruction set to enable secure biometric authentication. The SCAN secure processor is a modified SparcV8 processor architecture with a new instruction set to handle voice, iris, and fingerprint-based biometric authentication. The algorithms for processing biometric data are based on the local global graph methodology. The biometric modules are synthesized in reconfigurable logic and the results of the field-programmable gate array (FPGA) synthesis are presented. We propose to implement the above-mentioned modules in an off-chip FPGA co-processor. Further, the SCAN-secure processor will offer a SCAN-based encryption and decryption of 32 bit instructions and data.

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Citation

Raghudeep Kannavara ; Sukarno Mertoguno and Nikolaos Bourbakis
"SCAN secure processor and its biometric capabilities", J. Electron. Imaging. 20(2), 023014 (June 02, 2011). ; http://dx.doi.org/10.1117/1.3582930


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