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Realization of quantum dot Boolean logic gate for image processing applications

[+] Author Affiliations
M. Ganguly

Jadavpur University, Electronics and Telecommunication Engineering Department, Kolkata, West-Bengal 700032, India

C. K. Sarkar

Jadavpur University, Electronics and Telecommunication Engineering Department, Kolkata, West-Bengal 700032, India

J. Electron. Imaging. 16(2), 023003 (April 24, 2007). doi:10.1117/1.2723770
History: Received May 22, 2006; Revised November 09, 2006; Accepted December 07, 2006; Published April 24, 2007
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A two-dimensional (2D) periodic array of gallium arsenide (GaAs) quantum dots, embedded on the surface of a GaAs resonant tunneling diode (RTD), is investigated as a system for image processing. The embedded dot structures have been developed as a high-speed parallel processing device. The image processing task by QDs can be done through the realization of QD Boolean logic gates. It is shown that if the image data are introduced as initial conditions to these QD logic gates, the response of the system realizes a morphological image processing task similar to image dilation and erosion.

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© 2007 SPIE and IS&T

Citation

M. Ganguly and C. K. Sarkar
"Realization of quantum dot Boolean logic gate for image processing applications", J. Electron. Imaging. 16(2), 023003 (April 24, 2007). ; http://dx.doi.org/10.1117/1.2723770


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